1. Field of the Invention
The present invention relates to a polishing apparatus for polishing a workpiece such as a semiconductor wafer to a flat mirror finish, and more particularly to a polishing apparatus having a transferring device for transferring a workpiece between a top ring and a robot associated with the polishing apparatus.
2. Description of the Related Art
Recent rapid progress in semiconductor device integration demands smaller and smaller wiring patterns or interconnections and also narrower spaces between interconnections which connect active areas. One of the processes available for forming such interconnections is photolithography. Though the photolithographic process can form interconnections that are at most 0.5 .mu.m wide, it requires that surfaces on which pattern images are to be focused by a stepper be as flat as possible because the depth of focus of the optical system is relatively small.
It is therefore necessary to make the surfaces of semiconductor wafers flat for photolithography. One customary way of flattening the surfaces of semiconductor wafers is to polish them with a polishing apparatus.
Conventionally, a polishing apparatus has a turntable and a top ring which rotate at respective individual speeds. A polishing cloth is attached to the upper surface of the turntable. A semiconductor wafer to be polished is placed on the polishing cloth and clamped between the top ring and the turntable. An abrasive liquid containing abrasive grains is supplied onto the polishing cloth and retained on the polishing cloth. During operation, the top ring exerts a certain pressure on the turntable, and the surface of the semiconductor wafer held against the polishing cloth is therefore polished by a combination of chemical polishing and mechanical polishing to a flat mirror finish while the top ring and the turntable are rotated.
It has been customary to install a robot to transfer a semiconductor wafer therefrom to the top ring before it is polished, and to transfer the semiconductor wafer from the top ring thereto after it is polished. That is, the semiconductor wafer is transferred directly between the top ring and the hand of the robot which is associated with the polishing apparatus.
However, to transfer a semiconductor wafer directly between the top ring and the hand of the robot causes a conveyance error because the top ring and the robot usually have irregularities in conveying accuracy.
In order to improve the conveying accuracy of the top ring and the robot, it is preferable to install a transferring device, a so-called pusher, at a transfer position for the semiconductor wafer. In this case, the pusher has a function to place thereon a semiconductor wafer to be polished which has been conveyed by the hand of the robot, and then to lift and transfer the semiconductor wafer onto the top ring which has been moved over the pusher. Further, the pusher has another function to receive the semiconductor wafer which has been polished from the top ring, and then to transfer the semiconductor wafer onto the hand of the robot.
The pusher comprises a support table which has a support surface for supporting the lower surface of the semiconductor wafer and a plurality of guide pins disposed slightly outwardly of the support surface and having a tapered surface at a tip end thereof, and an actuating mechanism for vertically moving the support table.
When the pusher receives the semiconductor wafer from the robot, the semiconductor wafer is placed on the support surface while being guided by the guide pins. Since the associated members including the guide pins and the support table are dimensioned such that a slight clearance is formed between the guide pins and the semiconductor wafer, the semiconductor wafer is smoothly placed on the support surface of the support table. Thereafter, the semiconductor wafer is transferred to the top ring which is positioned above the support table and is in a standby condition.
In the conventional top ring, a retainer ring (or guide ring) is provided on the lower circumferential portion of the top ring to retain the semiconductor wafer, and the retainer ring is dimensioned such that the inner diameter of the retainer ring is relatively larger than the outer diameter of the semiconductor wafer. That is, a relatively large clearance (or play) is formed between the inner circumferential surface of the retainer ring and the outer periphery of the semiconductor wafer. Therefore, even if the center of the semiconductor wafer placed on the pusher and the center of the top ring are not properly aligned, the semiconductor wafer can be transferred from the pusher to the top ring. Conversely, also in case of transferring the semiconductor wafer from the top ring to the pusher, even if the center of the semiconductor wafer held by the top ring and the center of the support surface of the pusher are not properly aligned, the semiconductor wafer can be transferred from the top ring to the pusher by the function of the guide pins.
However, as semiconductor device integration progresses further, demand on enhancing uniformity of the polished surface of the semiconductor wafer is becoming strict. It follows that the center of the semiconductor wafer and the center of the top ring must be properly aligned to enhance the uniformity of polishing, and thus to enhance the uniformity of the polished surface of the semiconductor wafer by making a clearance between the inner circumferential surface of the retainer ring and the outer periphery of the semiconductor wafer as small as possible.
However, if the clearance between the inner circumferential surface of the retainer ring and the outer periphery of the semiconductor wafer is small, then the semiconductor wafer may not be properly placed within the retainer ring to cause a conveyance error when the semiconductor wafer is transferred to the top ring. In such case, the semiconductor wafer starts to be polished in such a state that a portion of the semiconductor wafer is placed on the lower surface of the retainer ring, thus causing crack in or damage to the semiconductor wafer.